Roger Chamberlain's Publications

• Steven D. Harris, Roger D. Chamberlain, and Christopher D. Gill. "Performance models for non-uniform heterogeneous platforms and their validation using structural equation modeling," International Journal of Networking and Computing, 16(1):20--51, January 2026.

• Nick Song, Marion Sudvarg, and Roger Chamberlain, "Connected-Component Labeling Using HLS for High-Energy Particle Physics Instruments," in Proc. of Workshops of the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC Workshops), November 2025, pp. 642-650. DOI: 10.1145/3731599.3767413. Presented at Eleventh International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC), St. Louis, MO, USA.

• Ye Htet, Marion Sudvarg, Honghao Yang, Jeremy Buhler, Roger Chamberlain, and James Buckley, Modeling and Optimizing Real-Time Telescope Interaction for Multi-wavelength Observation of Gamma-ray Bursts, in Proc. of Workshops of the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC Workshops), November 2025, pp. 2161-2168. DOI: 10.1145/3731599.3767475. Presented at Sixth Combined Workshop on Interactive and Urgent High-Performance Computing (WIUHPC), St. Louis, MO, USA.

• Marion Sudvarg, Isabel Pastrana, Richard Bose, Blake Bal, Roger Chamberlain, and James Buckley, for the APT Collaboration, "Front-end data acquisition and signal processing for the ADAPT telescope," in 21st Divisional Meeting of the High Energy Astrophysics Division (HEAD). American Astronomical Society, October 2025.

• Ye Htet, Marion Sudvarg, Jeremy Buhler, Roger Chamberlain, and James Buckley, for the APT Collaboration, "Neural network extensions for the GRB localization pipeline on the ADAPT gamma-ray telescope," in 21st Divisional Meeting of the High Energy Astrophysics Division (HEAD). American Astronomical Society, October 2025.

• Marion Sudvarg, Ye Htet, Roger D. Chamberlain, Jeremy D. Buhler, and James H. Buckley, "Call for Collaboration: Contributing to Multi-Messenger Astrophysics," in Proc. of 19th Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT), July 2025, pp. 63-67.

• Ye Htet, Marion Sudvarg, Honghao Yang, Jeremy Buhler, Roger Chamberlain, Wenlei Chen, James Buckley, and the APT Collaboration, "Performance Modeling and Improvements on the GRB Source Localization Streaming Pipeline Aboard the Antarctic Demonstrator for the Advanced Particle-Astrophysics Telescope (ADAPT)," in Proc. of 39th International Cosmic Ray Conference — PoS(ICRC2025), volume 501, pages 679:1--679:9, July 2025. DOI: 10.22323/1.501.0679.

• Marion Sudvarg, Longhao Huang, Boran Yang, Blake Bal, Roger Chamberlain, Jeremy Buhler, Leonardo Di Venere, Davide Serini, James Buckley, and the APT Collaboration, "FPGA-Based Data Processing using High-Level Synthesis on the Antarctic Demonstrator for the Advanced Particle-astrophysics Telescope (ADAPT)," in Proc. of 39th International Cosmic Ray Conference — PoS(ICRC2025), volume 501, pages 852:1--852:9, July 2025. DOI: 10.22323/1.501.0852.

• Steven D. Harris, Roger D. Chamberlain, and Christopher D. Gill, "Performance Modeling of Non-Uniform Heterogeneous Platforms," in Proc. of IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), June 2025, pp. 597-607. DOI: 10.1109/IPDPSW66978.2025.00094. Presented at 27th Workshop on Advances in Parallel and Distributed Computational Models, Milan, Italy.

• Binglin Ji, Chenfeng Zhao, Roger D. Chamberlain, "FGI: Fast GNN Inference on Multi-Core Systems," in Proc. of IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), June 2025, pp. 748-757. DOI: 10.1109/IPDPSW66978.2025.00119. Presented at Workshop on Graphs, Architectures, Programming, and Learning (GrAPL), Milan, Italy.

• Bill Siever, Michael Hall, Jim Feher, and Roger Chamberlain, "Teaching Digital Logic and Computer Architecture Using Open Source Tools," in Proc. of 22nd ACM International Conference on Computing Frontiers Workshops and Special Sessions, May 2025, pp. 53-56. DOI: 10.1145/3706594.3726971. Presented at 3rd Open Source Hardware Workshop (OSHW), Cagliari, Sardinia, Italy.

• Daisy Wang, Ye Htet, Marion Sudvarg, Roger Chamberlain, Jeremy Buhler, and James Buckley, "Coordinating Instruments for Multi-Messenger Astrophysics," in Proc. of 22nd ACM International Conference on Computing Frontiers Workshops and Special Sessions, May 2025, pp. 213-218. DOI: 10.1145/3706594.3727948. Invited paper at the conference Special Session on Computer Architectures in Space (CompSpace).

• Bill Siever, Michael Hall, Jim Feher, and Roger Chamberlain, "Digital Logic, Computer Architecture, and Dev Containers: Supporting Schools from Little to Large," in Proc. of 56th ACM Technical Symposium on Computer Science Education (SIGCSE), volume 2, February 2025, p. 1737. DOI: 10.1145/3641555.3705024.

• Chenfeng Zhao, Clayton J. Faber, Roger D. Chamberlain, and Xuan Zhang, "HLPerf: Demystifying the performance of HLS-based graph neural networks with dataflow architectures," ACM Transactions on Reconfigurable Technology and Systems, 18(1):2:1-2:26, March 2025. DOI: 10.1145/3655627.

• Clayton J. Faber and Roger D. Chamberlain, "Application of Network Calculus Models to Heterogeneous Streaming Applications," International Journal of Networking and Computing, 15(1):51-63, January 2025. DOI: 10.15803/ijnc.15.1_51.

• Ye Htet, Marion Sudvarg, Andrew Butzel, Jeremy D. Buhler, Roger D. Chamberlain, and James H. Buckley, "Machine Learning Aboard the ADAPT Gamma-Ray Telescope," in Proc. of Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis (SC-W), November 2024. DOI: 10.1109/SCW63240.2024.00008. Presented at 5th Workshop on Artificial Intelligence and Machine Learning for Scientific Applications (AI4S), Atlanta, GA, USA.

• Samatha Kodali, Jeremy Manin, Lissette Torres-Escobedo, Run Zhang, Chandler Ahrens, Chris Gill, and Roger D. Chamberlain, "Catoptric Surface Characteristics and Visual Feedback Control," in Proc. of 19th IEEE Conference on Industrial Electronics and Applications (ICIEA), August 2024. DOI: 10.1109/ICIEA61579.2024.10665117.

• Marion Sudvarg, Ye Htet, Sanjoy Baruah, Jeremy Buhler, Roger Chamberlain, Chris Gill, and Jim Buckley, "Adaptive Execution for Real-Time Observations of Astrophysical Transients," in Proc. of 13th International Real-Time Scheduling Open Problems Seminar (RTSOPS), July 2024.

• Clayton J. Faber and Roger D. Chamberlain, "Application of network calculus models to heterogeneous streaming applications," in Proc. of IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), May 2024, pp. 198-201. DOI: 10.1109/IPDPSW63119.2024.00057. Presented at 26th Workshop on Advances in Parallel and Distributed Computational Models (APDCM), San Fransisco, CA, USA.

• Marion Sudvarg, Chenfeng Zhao, Ye Htet, Meagan Konst, Thomas Lang, Nick Song, Roger D. Chamberlain, Jeremy Buhler, and James H. Buckley, "HLS Taking Flight: Toward Using High-Level Synthesis Techniques in a Space-Borne Instrument," in Proc. of 21st ACM International Conference on Computing Frontiers (CF), May 2024, pp. 124-134. DOI: 10.1145/3649153.3649209.

• James H. Buckley, Jeremy Buhler, and Roger D. Chamberlain, "The Advanced Particle-astrophysics Telescope (APT): Computation in Space," in Proc. of 21st ACM International Conference on Computing Frontiers Workshops and Special Sessions, May 2024, pp. 121-127. DOI: 10.1145/3637543.3652980. Invited paper at the conference Special Session on Computer Architectures in Space (CompSpace).

• Ye Htet, Marion Sudvarg, Jeremy Buhler, Roger Chamberlain, and James Buckley, for the APT Collaboration, "A Computational Pipeline for Prompt Gamma-Ray Burst Localization Aboard APT and ADAPT," presented at 21st Divisional Meeting of the High Energy Astrophysics Division (HEAD), American Astronomical Society, April 2024. Poster image is here.

• Marion Sudvarg, Ye Htet, Jeremy Buhler, Roger Chamberlain, Chris Gill, James Buckley, Wenlei Chen, for the APT Collaboration, "Adaptive Real-Time Computation for Prompt Localization of Transients," presented at 21st Divisional Meeting of the High Energy Astrophysics Division (HEAD), American Astronomical Society, April 2024. Poster image is here.

• Ye Htet, Marion Sudvarg, Jeremy Buhler, Roger D. Chamberlain, and James H. Buckley, "Localization of Gamma-ray Bursts in a Balloon-Borne Telescope," in Proc. of Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis (SC-W), November 2023, pp. 395-398. DOI: 10.1145/3624062.3624107. Presented at 1st Workshop on Enabling Predictive Science with Optimization and Uncertainty Quantification in HPC (EPSOUQ-HPC), Denver, CO, USA.

• Chenfeng Zhao, Zehao Dong, Yixin Chen, Xuan Zhang, and Roger Chamberlain, "GNNHLS: Evaluating Graph Neural Network Inference via High-Level Synthesis," in Proc. of 41st IEEE International Conference on Computer Design (ICCD), November 2023, pp. 574-577. DOI: 10.1109/ICCD58817.2023.00092.

• Tim Bell, Roger D. Chamberlain, Chris Edmiston, Addison Elliott, and Todd Steinbrueck, "Efficient Monitoring of Livestock Feed Inventories," in Proc. of IEEE Conference on AgriFood Electronics (CAFE), September 2023, pp. 75-79. DOI: 10.1109/CAFE58535.2023.10291580.

• Marion Sudvarg, Jeremy Buhler, Roger D. Chamberlain, Chris Gill, James Buckley, and Wenlei Chen, "Parameterized Workload Adaptation for Fork-Join Tasks with Dynamic Workloads and Deadlines," in Proc. of IEEE 29th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), August 2023, pp. 232-242. DOI: 10.1109/RTCSA58653.2023.00035.

• Ye Htet, Marion Sudvarg, Jeremy Buhler, Roger D. Chamberlain, Wenlei Chen, and James Buckley, for the APT Collaboration, "Prompt and Accurate GRB Source Localization Aboard the Advanced Particle Astrophysics Telescope (APT) and its Antarctic Demonstrator (ADAPT)," in Proc. of 38th International Cosmic Ray Conference — PoS (ICRC), volume 444, July 2023, pp. 956:1-956:9. DOI: 10.22323/1.444.0956.

• Marion Sudvarg, Ye Htet, Roger D. Chamberlain, Jeremy Buhler, Blake Bal, Corrado Altomare, Davide Serini, Mario Nicola Mazziotta, Leonardo Di Venere, Wenlei Chen, and James Buckley, for the APT Collaboration, "Front-End Computational Modeling and Design for the Antarctic Demonstrator for the Advanced Particle-astrophysics Telescope," in Proc. of 38th International Cosmic Ray Conference — PoS (ICRC), volume 444, July 2023, pp. 764:1-764:9. DOI: 10.22323/1.444.0764.

• Jinwen Wang, Yuhao Wu, Han Liu, Bo Yuan, Roger Chamberlain, and Ning Zhang, "IP Protection in TinyML," in Proc. of 60th ACM/IEEE Design Automation Conference (DAC), July 2023. DOI: 10.1109/DAC56929.2023.10247898.

• Chenfeng Zhao, Roger D. Chamberlain, and Xuan Zhang, "SuperCut: Communication-Aware Partitioning for Near-Memory Graph Processing," in Proc. of 20th ACM International Conference on Computing Frontiers (CF), May 2023, pp. 44-53. DOI: 10.1145/3587135.3592209.

• Marion Sudvarg, Meagan Konst, Thomas Lang, Diana Pacheco-Garcia, Roger Chamberlain, and Jeremy Buhler, for the APT Collaboration, "Design of Front-end Signal Processing for the Advanced Particle-astrophysics Telescope," presented at 20th Divisional Meeting of the High Energy Astrophysics Division, American Astronomical Society, March 2023. Poster image is here.

• Ye Htet, Marion Sudvarg, Jeremy Buhler, Roger Chamberlain, and James Buckley, for the APT Collaboration, "Prompt, Accurate Localization of Gamma-Ray Bursts in the Advanced Particle-astrophysics Telescope," presented at 20th Divisional Meeting of the High Energy Astrophysics Division, American Astronomical Society, March 2023. Poster image is here.

• Wenlei Chen, James Buckley, Roger Chamberlain, and Marion Sudvarg, for the APT Collaboration, "The Advanced Particle-astrophysics Telescope: Reconstruction of the MeV gamma-ray sky and estimation of point-source sensitivity in the presence of the background," presented at 20th Divisional Meeting of the High Energy Astrophysics Division, American Astronomical Society, March 2023. Poster image is here.

• Clayton J. Faber, Steven D. Harris, Zhili Xiao, Roger D. Chamberlain, and Anthony M. Cabrera, "Challenges designing for FPGAs using high-level synthesis," in Proc. of IEEE High-Performance Extreme Computing Conference (HPEC), September 2022. DOI: 10.1109/HPEC55821.2022.9926398.

• Chenfeng Zhao, Roger D. Chamberlain, and Xuan Zhang, "Graph Partitioning for Near Memory Processing," presented at In-Memory Architectures and Computing Applications Workshop (iMACAW), July 2022. Poster image is here.

• Marion Sudvarg, Jeremy Buhler, Roger Chamberlain, Chris Gill, and James Buckley, "Work in Progress: Real-Time GRB Localization for the Advanced Particle-astrophysics Telescope," in Proc. of 15th Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT), July 2022, pp. 57-61.

• Tim Bell, Todd Steinbrueck, Roger D. Chamberlain, and Brian Rieck, "IoT Benefits for Livestock Farmers," in Proc. of 18th International Conference on Distributed Computing in Sensor Systems (DCOSS), May 2022, pp. 159-166. DOI: 10.1109/DCOSS54816.2022.00038. Presented at 4th International Workshop on IoT Applications and Industry 4.0 (IoTI4), Marina del Rey, CA, USA.

• Chenfeng Zhao, Xuan Zhang, and Roger D. Chamberlain, "Executing Data Integration Effectively and Efficiently Near the Memory," IEEE Design & Test, 29(2):65-73, April 2022. DOI: 10.1109/MDAT.2021.3069957.

• Roger D. Chamberlain, James Orr, Doug Shook, and Bill Siever, Advancing Your Arduino Game: Early and Engaging Scaffolding for Advanced CS," in Proc. of 53rd ACM Technical Symposium on Computer Science Education (SIGCSE), volume 2, March 2022, p. 1196. DOI: 10.1145/3478432.3499143.

• Jacob Wheelock, William Kanu, Marion Sudvarg, Zhili Xiao, Jeremy D. Buhler, Roger D. Chamberlain, and James H. Buckley, "Supporting multi-messenger astrophysics with fast gamma-ray burst localization," in Proc. of IEEE/ACM HPC for Urgent Decision Making Workshop (UrgentHPC), November 2021. DOI: 10.1109/UrgentHPC54802.2021.00008.

• Clayton J. Faber, Tom Plano, Samatha Kodali, Zhili Xiao, Abhishek Dwaraki, Jeremy D. Buhler, Roger D. Chamberlain, and Anthony M. Cabrera, "Platform agnostic streaming data application performance models," in Proc. of IEEE/ACM Workshop on Redefining Scalability for Diversely Heterogeneous Architectures (RSDHA), November 2021. DOI: 10.1109/RSDHA54838.2021.00008.

• Zhili Xiao, Roger D. Chamberlain, and Anthony M. Cabrera, "HLS Portability from Intel to Xilinx: A Case Study," in Proc. of IEEE High-Performance Extreme Computing Conference (HPEC), September 2021. DOI: 10.1109/HPEC49654.2021.9622785.

• Bryan Orabutt, Roger D. Chamberlain, Jonathan Elson, George Engel, Franck Delaunay, and Lee G. Sobotka, "Design of Mixed-mode Systems for Pulse-shape Discrimination," in Proc. of IEEE 64th International Midwest Symposium on Circuits and Systems (MWSCAS), August 2021, pp. 990-994. DOI: 10.1109/MWSCAS47672.2021.9531905.

• James H. Buckley on behalf of the APT Collaboration, "The Advanced Particle-astrophysics Telescope (APT) Project Status," in Proc. of 37th International Cosmic Ray Conference — PoS (ICRC), volume 395, pages 655:1--655:9, July 2021. DOI: 10.22323/1.395.0655.

• Anthony M. Cabrera, Aaron R. Young, Jacob Lambert, Zhili Xiao, Amy An, Seyong Lee, Zheming Jin, Jungwon Kim, Jeremy Buhler, Roger D. Chamberlain, and Jeffrey S. Vetter, "Toward Evaluating High-Level Synthesis Portability and Performance between Intel and Xilinx FPGAs," in Proc. of 9th International Workshop on OpenCL (IWOCL), April 2021. DOI: 10.1145/3456669.3456699.

• Michael J. Hall, Neil E. Olson, and Roger D. Chamberlain, "Utilizing Virtualized Hardware Logic Computations to Benefit Multi-User Performance," Electronics, 10(6):665, March 2021. DOI: 10.3390/electronics10060665.

• Bryan Orabutt, Roger Chamberlain, Jonathan Elson, George Engel, and Lee Sobotka, "Applied optimization on mixed mode systems for pulse shape discrimination, in Bulletin of the American Physical Society, October 2020. URL: https://meetings.aps.org/Meeting/DNP20/Session/DN.4.

• Roger D. Chamberlain, "Architecturally Truly Diverse Systems: A Review," Future Generation Computer Systems, 110:33-44, September 2020. DOI: 10.1016/j.future.2020.03.061.

• Steven Harris, Roger D. Chamberlain, and Christopher Gill, "OpenCL Performance on the Intel Heterogeneous Architecture Research Platform," in Proc. of IEEE High-Performance Extreme Computing Conference (HPEC), September 2020. DOI: 10.1109/HPEC43674.2020.9286213. Source code is here.

• Anthony M. Cabrera and Roger D. Chamberlain, "Design and Performance Evaluation of Optimizations for OpenCL FPGA Kernels," in Proc. of IEEE High-Performance Extreme Computing Conference (HPEC), September 2020. DOI: 10.1109/HPEC43674.2020.9286221.

• Darko Ivanovich, Amit Deliwala, Chenfeng Zhao, Viktor Gruev, Xuan Zhang, and Roger D. Chamberlain, "Chip-to-chip Optical Data Communications using Polarization Division Multiplexing," in Proc. of IEEE High-Performance Extreme Computing Conference (HPEC), September 2020. DOI: 10.1109/HPEC43674.2020.9286227.

• Anthony M. Cabrera and Roger D. Chamberlain, "Designing Domain Specific Computing Systems," in Proc. of IEEE 28th International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2020. DOI: 10.1109/FCCM48280.2020.00052. Talk video is here, or here.

• Roger D. Chamberlain and Todd Steinbrueck, "Demo Abstract: More Than Two Decades of IoT," in Proc. of ACM/IEEE International Conference on Internet of Things Design and Implementation (IoTDI), April 2020. DOI: 10.1109/IoTDI49375.2020.00041. Demo video is here.

• Anthony M. Cabrera, Roger D. Chamberlain, and Jonathan C. Beard, "Multi-spectral Reuse Distance: Divining Spatial Information from Temporal Data," in Proc. of IEEE High-Performance Extreme Computing Conference (HPEC), September 2019. DOI: 10.1109/HPEC.2019.8916398.

• Tim Bell, Roger D. Chamberlain, Mike Chambers, Brian Rieck, and Todd Steinbrueck, "Security on the Farm: Safely Communicating with Legacy Agricultural Instrumentation," in Proc. of 15th International Conference on Distributed Computing in Sensor Systems (DCOSS), May 2019, pp. 192-194. DOI: 10.1109/DCOSS.2019.00052. Poster image is here.

• Roger D. Chamberlain, Mike Chambers, Darren Greenwalt, Maria Scharth, Brett Steinbrueck, Todd Steinbrueck, and David Thomas, "Water in the Cloud: Understanding Water Chemistry via the Internet of Things," in Proc. of 15th International Conference on Distributed Computing in Sensor Systems (DCOSS), May 2019, pp. 408-415. DOI: 10.1109/DCOSS.2019.00084. Presented at 1st International Workshop on IoT Applications and Industry 4.0 (IoTI4), Santorini, Greece.

• Anthony M. Cabrera and Roger D. Chamberlain, "Exploring Portability and Performance of OpenCL FPGA Kernels on Intel HARPv2," in Proc. of 7th International Workshop on OpenCL (IWOCL), May 2019. DOI: 10.1145/3318170.3318180. Received Best Presentation award.

• Clayton J. Faber, Anthony M. Cabrera, Oronde Booker, Gabe Maayan, and Roger D. Chamberlain, "Data Integration Tasks on Heterogeneous Systems Using OpenCL," in Proc. of 7th International Workshop on OpenCL (IWOCL), May 2019. DOI: 10.1145/3318170.3318187. Poster image is here.

• Chandler Ahrens, Roger Chamberlain, Scott Mitchell, Adam Barnstorff and Joshua Gelbard, "Controlling Daylight Reflectance with Cyber-physical Systems," in Proc. of 24th International Conference on Computer-Aided Architectural Design Research in Asia (CAADRIA), Volume 1, April 2019, pp. 433-442. URL: http://papers.cumincad.org/cgi-bin/works/paper/caadria2019_413.

• Bill Siever, Roger D. Chamberlain, Elliott Forbes, and Ingrid Russell, "Including Embedded Systems in CS: Why? When? and How?," in Proc. of 50th ACM Technical Symp. on Computer Science Education (SIGCSE), February 2019, pp. 328-329. DOI: 10.1145/3287324.3287327.

• Chandler Ahrens, Roger D. Chamberlain, Scott Mitchell, and Adam Barnstorff, "Catoptric Surface," in Proc. of 38th Conference of Association for Computer Aided Design in Architecture (ACADIA), October 2018, pp. 216-225. URL: http://papers.cumincad.org/cgi-bin/works/Show?acadia18_216.

• Roger D. Chamberlain, Ron K. Cytron, Doug Shook, and Bill Siever, "Computers Interacting with the Physical World: A First-Year Course," in Proc. of Workshop on Embedded and Cyber-Physical Systems Education (WESE), October 2018. DOI: 10.1007/978-3-030-23703-5_11.

• Roger D. Chamberlain, Chandler Ahrens, Christopher Gill, Scott A. Mitchell, "Work-in-Progress: Hierarchical Control of a Catoptric Surface," in Proc. of International Conference on Embedded Software (EMSOFT), October 2018. DOI: 10.1109/EMSOFT.2018.8537230.

• Lin Ma, Roger D. Chamberlain, Kunal Agrawal, Chen Tian, and Ziang Hu, "Analysis of Classic Algorithms on Highly-threaded Many-core Architectures," Future Generation Computer Systems, 82:528-543, May 2018. DOI: 10.1016/j.future.2017.02.007.

• Anthony M. Cabrera, Clayton J. Faber, Kyle Cepeda, Robert Derber, Cooper Epstein, Jason Zheng, Ron K. Cytron, and Roger D. Chamberlain, "DIBS: A Data Integration Benchmark Suite," in Proc. of ACM/SPEC International Conference on Performance Engineering Companion (ICPE), April 2018, pp. 25-28. DOI: 10.1145/3185768.3186307.

• Roger D. Chamberlain, Chris Edmiston, and Don Williams, "Automated Titration in a Recirculating Water System," in Proc. of 4th International Workshop on Cyber-Physical Systems for Smart Water Networks (CySWater), April 2018, pp. 12-15. DOI: 10.1109/CySWater.2018.00010.

• Roger D. Chamberlain, Chandler Ahrens, and Chris Gill, "Abstractions for Cyber-Physical Systems Development: An International Opportunity," presented at Visioning Workshop for International Networks to Advance CPS Research, Development, and Education Worldwide, April 2018. URL: https://cps-vo.org/node/48624.

• Michael J. Hall, Viktor Gruev, and Roger D. Chamberlain, "Characterization of a Binary Output Resistance-to-Voltage Read Circuit for Sensing Magnetic Tunnel Junctions," IEEE Sensors Journal, 18(3):1023-1031, February 2018. DOI: 10.1109/JSEN.2017.2780112.

• Darko Ivanovich, Samuel B. Powell, Viktor Gruev, and Roger D. Chamberlain, "Polarization Division Multiplexing for Optical Data Communications," in Proc. of SPIE 10538, Photonics West, Optical Interconnects XVIII, 2018, p. 105381D-1. DOI: 10.1117/12.2290452.

• Roger D. Chamberlain, Mike Chambers, Darren Greenwalt, Brett Steinbrueck, and Todd Steinbrueck, "Devices can be Secure and Easy to Install on the Internet of Things," in R. Gravina, C.E. Palau, M. Manso, A. Liotta and G. Fortino, editors, Interconnection, Integration, and Interoperability of IoT Systems, Springer, 2018, pp. 59-76. DOI: 10.1007/978-3-319-61300-0_4.

• Roger D. Chamberlain, "Assessing User Preferences in Programming Language Design," in Proc. of ACM SIGPLAN International Symposium on New Ideas, New Paradigms, and Reflections on Programming and Software (Onward!), October 2017, pp. 18-29. DOI: 10.1145/3133850.3133851.

• Jonathan C. Beard, Peng Li, and Roger D. Chamberlain, "RaftLib: A C++ template library for high performance stream parallel processing," International Journal of High Performance Computing Applications, 31(5):391-404, September 2017. DOI: 10.1177/1094342016672542.

• Roger D. Chamberlain, Mike Chambers, Darren Greenwalt, Brett Steinbrueck, and Todd Steinbrueck, "Poster Abstract: Water in the Cloud: Remote Understanding of Water Chemistry," in Proc. of ACM/IEEE 2nd International Conference on Internet-of-Things Design and Implementation (IoTDI), April 2017, pp. 353-354. DOI: 10.1145/3054977.3057327. Poster image is here.

• John Meier, Christopher Gill, and Roger D. Chamberlain, "Combining Admission and Modulation Decisions for Wireless Embedded Systems," in Proc. of 19th IEEE International Symposium on Real-Time Computing (ISORC), May 2016, pp. 69-78. DOI: 10.1109/ISORC.2016.19.

• Roger D. Chamberlain, Mike Chambers, Darren Greenwalt, Brett Steinbrueck, and Todd Steinbrueck, "Layered Security and Ease of Installation for Devices on the Internet of Things," in Proc. of IEEE 1st International Conference on Internet-of-Things Design and Implementation (IoTDI), April 2016, pp. 297-300. DOI: 10.1109/IoTDI.2015.32. Presented at 1st International Workshop on Interoperability, Integration, and Interconnection of Internet of Things (I4T), Berlin, Germany.

• Michael J. Hall and Roger D. Chamberlain, "Using M/G/1 Queueing Models with Vacations to Analyze Virtualized Logic Computations," in Proc. of 33rd IEEE International Conference on Computer Design (ICCD), October 2015, pp. 86-93. DOI: 10.1109/ICCD.2015.7357087.

• Jonathan C. Beard, Cooper Epstein, and Roger D. Chamberlain, "Online Automated Reliability Classification of Queueing Models for Streaming Processing Using Support Vector Machines," in Proc.of 21st International Conference on Parallel and Distributed Computing (Euro-Par), Lecture Notes in Computer Science, Vol. 9233, August 2015, pp. 82-93.

• Jonathan C. Beard and Roger D. Chamberlain, "Run Time Approximation of Non-blocking Service Rates for Streaming Systems," in Proc. of IEEE 17th International Conference on High Performance Computing and Communications (HPCC), August 2015, pp. 792-797.

• Joseph G. Wingbermuehle, Ron K. Cytron, and Roger D. Chamberlain, "Superoptimizing Memory Subsystems for Multiple Objectives," in Proc. of 4th International Workshop on On-chip Memory Hierarchies and Interconnects (OMHI), Lecture Notes in Computer Science, Vol. 9523, August 2015, pp. 352-363.

• Joseph G. Wingbermuehle, Ron K. Cytron, and Roger D. Chamberlain, "Superoptimized Memory Subsystems for Streaming Applications," in Proc. of ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), February 2015, pp. 126-135.

• Jonathan C. Beard, Cooper Epstein, and Roger D. Chamberlain, "Automated Reliability Classification of Queueing Models for Streaming Computation," in Proc. of 6th ACM/SPEC International Conference on Performance Engineering (ICPE), February 2015, pp. 325-328.

• Jonathan C. Beard, Peng Li and Roger D. Chamberlain, "RaftLib: A C++ Template Library for High Performance Stream Parallel Processing," in Proc. of 6th International Workshop on Programming Models and Applications for Multicores and Manycores (PMAM), February 2015, pp. 96-105.

• Peng Li, Kunal Agrawal, Jeremy Buhler, and Roger D. Chamberlain, "Orchestrating Safe Streaming Computations with Precise Control," in Proc. of International Workshop on Extreme Scale Computing Application Enablement - Modeling and Tools (ESCAPE), December 2014.

• Jonathan C. Beard and Roger D. Chamberlain, "Use of a Levy Distribution for Modeling Best Case Execution Time Variation," in Computer Performance Engineering, Lecture Notes in Computer Science, Volume 8721, September 2014, pp. 74-88.

• Lin Ma, Roger D. Chamberlain, and Kunal Agrawal, "Analysis of Classic Algoritms on GPUs," in Proc. of International Conference on High Performance Computing & Simulation (HPCS), July 2014, pp. 65-73.

• Lin Ma, Roger D. Chamberlain, and Kunal Agrawal, "Performance Modeling for Highly-threaded Many-core GPUs," in Proc. of IEEE 25th International Conference on Application-specific Systems, Architectures and Processors (ASAP), June 2014, pp. 84-91.

• Michael J. Hall and Roger D. Chamberlain, "Performance Modeling of Virtualized Custom Logic Computations," in Proc. of IEEE 25th International Conference on Application-specific Systems, Architectures and Processors (ASAP), June 2014, pp. 72-73.

• Joseph G. Wingbermuehle, Ron K. Cytron, and Roger D. Chamberlain, "Superoptimization of Memory Subsystems," in Proc. of ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), June 2014, pp 145-154.

• Michael J. Hall and Roger D. Chamberlain, "Performance Modeling of Virtualized Custom Logic Computations," in Proc. of Great Lakes Symposium on VLSI (GLSVLSI), May 2014, pp. 89-90.

• Lin Ma, Kunal Agrawal, and Roger D. Chamberlain, "Theoretical Analysis of Classic Algorithms on Highly-Threaded Many-Core GPUs," in Proc. of 19th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), February 2014, pp. 391-392.

• Lin Ma, Kunal Agrawal, and Roger D. Chamberlain, "A Memory Access Model for Highly-Threaded Many-Core Architectures," Future Generation Computer Systems, 30:202-215, January 2014.

• Joseph G. Wingbermuehle, Ron K. Cytron, and Roger D. Chamberlain, "Optimization of Application-Specific Memories," IEEE Computer Architecture Letters, 13(1):45-48, Jan.-June 2014.

• Peng Li, Kunal Agrawal, Jeremy D. Buhler, and Roger D. Chamberlain, "Adding Data Parallelism to Streaming Pipelines for Throughput Optimization," in Proc. of IEEE Conference on High Performance Computing (HiPC), December 2013, pp. 20-29.

• John Meier, Benjamin Karaus, Shreeharsha Sisla, Terry Tidwell, Roger D. Chamberlain, and Christopher Gill, "Assessing the Appropriateness of using Markov Decision Processes for RF Spectrum Management", in Proc. of ACM International Conference on Modeling, Analysis, and Simulation of Wireless and Mobile Systems (MSWiM), November 2013, pp. 41-48.

• Shobana Padmanabhan, Yixin Chen, and Roger D. Chamberlain, "Unchaining in Design-space Optimization of Streaming Applications," in Proc. of Workshop on Data-Flow Execution Models for Extreme Scale Computing (DFM), September 2013.

• Joseph G. Wingbermuehle, Ron K. Cytron, and Roger D. Chamberlain, "Compiling for Power with ScalaPipe," Journal of Systems Architecture, 59(8):615-625, September 2013.

• Jonathan C. Beard and Roger D. Chamberlain, "Analysis of a Simple Approach to Modeling Performance for Streaming Data Applications," in Proc. of IEEE International Symposium on Modelling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), August 2013, pp. 345-349.

• Jonathan C. Beard and Roger D. Chamberlain, "Use of Simple Analytic Performance Models for Streaming Data Applications Deployed on Diverse Architectures," in Proc. of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2013, pp. 138-139.

• Shobana Padmanabhan, Yixin Chen, and Roger D. Chamberlain, "Decomposition Techniques for Optimal Design-Space Exploration of Streaming Applications," in Proc. of 18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), February 2013, pp. 285-286.

• Lin Ma, Kunal Agrawal, and Roger D. Chamberlain, "A Memory Access Model for Highly-threaded Many-core Architectures," in Proc. of IEEE 18th International Conference on Parallel and Distributed Systems (ICPADS), December 2012, pp. 339-347.

• Shobana Padmanabhan, Yixin Chen, and Roger D. Chamberlain, "Convexity in Non-convex Optimizations of Streaming Applications," in Proc. of IEEE 18th International Conference on Parallel and Distributed Systems (ICPADS), December 2012, pp. 668-675.

• Michael J. Hall, Viktor Gruev, and Roger D. Chamberlain, "Performance of a Resistance-To-Voltage Read Circuit for Sensing Magnetic Tunnel Junctions," in Proc. of 55th International Midwest Symposium on Circuits and Systems (MWSCAS), August 2012, pp. 639-642.

• Joseph G. Wingbermuehle, Roger D. Chamberlain, and Ron K. Cytron, "ScalaPipe: A Streaming Application Generator," in Proc. of Symposium on Application Accelerators in High-Performance Computing (SAAHPC), July 2012.

• Lin Ma and Roger D. Chamberlain, "A Performance Model for Memory Bandwidth Constrained Applications on Graphics Engines," in Proc. of 23rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2012, pp. 24-31.

• Jeremy D. Buhler, Kunal Agrawal, Peng Li, and Roger D. Chamberlain, "Efficient Deadlock Avoidance for Streaming Computation with Filtering," in Proc. of 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), February 2012, pp. 235-246.

• Joseph M. Lancaster, Joseph G. Wingbermuehle, Jonathan C. Beard, and Roger D. Chamberlain, "Crossing Boundaries in TimeTrial: Monitoring Communications Across Architecturally Diverse Computing Platforms," in Proc. of Ninth IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC), October 2011, pp. 280-287.

• Lin Ma, Roger D. Chamberlain, Jeremy D. Buhler, and Mark A. Franklin, "Bloom Filter Performance on Graphics Engines," in Proc. of 40th International Conference on Parallel Processing (ICPP), September 2011, pp. 522-531.

• Joseph M. Lancaster, E. F. Berkley Shands, Jeremy D. Buhler, and Roger D. Chamberlain, "TimeTrial: A Low-Impact Performance Profiler for Streaming Data Applications," in Proc. of 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), September 2011, pp. 69-76.

• Shobana Padmanabhan, Yixin Chen, and Roger D. Chamberlain, "Optimal Design-Space Exploration of Streaming Applications," in Proc. of 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), September 2011, pp. 227-230.

• Joseph M. Lancaster, Joseph G. Wingbermuehle, and Roger D. Chamberlain, "Asking for Performance: Exploiting Developer Intuition to Guide Instrumentation with TimeTrial," in Proc. of 13th International Conference on High Performance Computing and Communications (HPCC), September 2011, pp. 321-330.

• John Meier, Christopher Gill, and Roger D. Chamberlain, "Towards More Effective Spectrum Use Based on Memory Allocation Models," in Proc. of 35th IEEE Computer Software and Applications Conference (COMPSAC), July 2011, pp. 426-435.

• Todd Sproull and Roger D. Chamberlain, "Evaluation of the Placement of Network Services," in Proc. of 2011 International Conference on Internet Computing (ICOMP), July 2011, pp. 10-16.

• Michael J. Hall, Viktor Gruev, and Roger D. Chamberlain, "Noise Analysis of a Current-Mode Read Circuit for Sensing Magnetic Tunnel Junction Resistance," in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), May 2011, pp. 1816-1819.

• Narayan Ganesan, Roger D. Chamberlain, Jeremy Buhler, and Michela Taufer, "Rolling Partial Prefix-Sums To Speedup Evaluation of Uniform and Affine Recurrence Equations," in Proc. of SPIE Defense, Security, and Sensing Conference, April 2011.

• Arpith C. Jacob, Joseph M. Lancaster, Jeremy D. Buhler, and Roger D. Chamberlain, "FPGA Acceleration of Seeded Similarity Searching," in B. Schmidt, editor, Bioinformatics: High Performance Parallel Computer Architectures, CRC Press, 2011, pp. 157-180. DOI: 10.1201/EBK1439814888-c8.

• Narayan Ganesan, Roger D. Chamberlain, Jeremy Buhler, and Michela Taufer, "Accelerating HMMER on GPUs by Implementing Hybrid Data and Task Parallelism," in Proc. of ACM International Conference on Bioinformatics and Computational Biology (ACM-BCB), August 2010, pp. 418-421.

• Rahav Dor, Joseph M. Lancaster, Mark A. Franklin, Jeremy Buhler, and Roger D. Chamberlain, "Using Queuing Theory to Model Streaming Applications," in Proc. of 2010 Symposium on Application Accelerators in High Performance Computing (SAAHPC), July 2010.

• Joseph M. Lancaster and Roger D. Chamberlain, "Crossing Timezones in the TimeTrial Performance Monitor," in Proc. of 2010 Symposium on Application Accelerators in High Performance Computing (SAAHPC), July 2010.

• Shobana Padmanabhan, Yixin Chen, and Roger D. Chamberlain, "Design-space Optimization for Automatic Acceleration of Streaming Applications," in Proc. of 2010 Symposium on Application Accelerators in High Performance Computing (SAAHPC), July 2010.

• Roger D. Chamberlain and Joseph M. Lancaster, "Better Languages for More Effective Designing," in Proc. of 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms (ERSA), July 2010.

• Todd Sproull and Roger D. Chamberlain, "Distributed Algorithms for the Placement of Network Services," in Proc. of 2010 International Conference on Internet Computing (ICOMP), July 2010.

• Arpith C. Jacob, Jeremy D. Buhler, and Roger D. Chamberlain, "Design of throughput-optimized arrays from recurrence abstractions," in Proc. of 21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2010, pp. 133-140.

• Peng Li, Kunal Agrawal, Jeremy Buhler, Roger D. Chamberlain, and Joseph M. Lancaster, "Deadlock-avoidance for Streaming Applications with Split-Join Structure: Two Case Studies," in Proc. of 21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2010, pp. 333-336.

• Peng Li, Kunal Agrawal, Jeremy Buhler, and Roger D. Chamberlain, "Deadlock Avoidance for Streaming Computation with Filtering," in Proc. of 22nd ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), June 2010, pp. 243-252.

• Arpith C. Jacob, Jeremy D. Buhler, and Roger D. Chamberlain, "Rapid RNA Folding: Analysis and Acceleration of the Zuker Recurrence," in Proc. of 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2010, pp. 87-94.

• Ross Sowell, Christopher Gill, Roger D. Chamberlain, Cindy Grimm, Kenneth J. Goldman and Mark Tranel, "The active-learning transformation: a case study in software development and systems software courses," Journal of Computing Sciences in Colleges, 25(5):165-172, May 2010.

• Roger D. Chamberlain, Jeremy Buhler, Mark A. Franklin, and James H. Buckley, "Application-guided Tool Development for Architecturally Diverse Computation," in Proc. of Symposium on Applied Computing (SAC), March 2010, pp. 496-501.

• Roger D. Chamberlain, Mark A. Franklin, Eric J. Tyson, James H. Buckley, Jeremy Buhler, Greg Galloway, Saurabh Gayen, Michael Hall, E.F. Berkley Shands, and Naveen Singla, "Auto-Pipe: Streaming Applications on Architecturally Diverse Systems," Computer, 43(3):42-49, March 2010.

• Roger D. Chamberlain and Narayan Ganesan, "Sorting on Architecturally Diverse Computer Systems," in Proc. of Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA), November 2009, pp. 36-46 (associated with Supercomputing'09).

• Octav Chipara, Christopher Brooks, Sangeeta Bhattacharya, Chenyang Lu, Roger D. Chamberlain, Gruia-Catalin Roman, and Thomas C. Bailey, "Reliable Real-time Clinical Monitoring Using Sensor Network Technology," in American Medical Informatics Association (AMIA) Annual Symposium Proceedings, November 2009.

• Joseph M. Lancaster, Jeremy D. Buhler, and Roger D. Chamberlain, "Efficient Runtime Performance Monitoring of FPGA-based Applications," in Proc. of 22nd IEEE International System-on-Chip Conf. (SoCC), September 2009, pp. 23-28.

• Arpith C. Jacob, Jeremy D. Buhler, and Roger D. Chamberlain, "Optimal Runtime Reconfiguration Strategies for Systolic Arrays," in Proc. of 19th International Conference on Field Programmable Logic and Applications (FPL), August 2009, pp.162-167.

• Narayan Ganesan, Roger D. Chamberlain, and Jeremy Buhler, "Acceleration of Binomial Options Pricing via Parallelizing along Time-axis on a GPU," in Proc. of Symp. on Application Accelerators in High Performance Computing (SPAAHPC), July 2009.

• Joseph Lancaster, Jeremy Buhler, and Roger D. Chamberlain, "Acceleration of Ungapped Extension in Mercury BLAST," Microprocessors and Microsystems, 33(4):281-289, June 2009.

• Michael Hall, Albrecht Jander, Roger D. Chamberlain, and Pallavi Dhagat, "Globally Clocked Magnetic Logic Circuits," in Digest of International Magneticb Conference (Intermag), May 2009.

• Naveen Singla, Michael Hall, Berkley Shands, and Roger D. Chamberlain, "Financial Monte Carlo Simulation on Architecturally Diverse Systems," in Proc. of Workshop on High Performance Computational Finance, November 2008 (associated with Supercomputing'08). DOI: 10.1109/WHPCF.2008.4745401.

• Eric J. Tyson, James Buckley, Mark A. Franklin, and Roger D. Chamberlain, "Acceleration of atmospheric Cherenkov telescope signal processing to real-time speed with the Auto-Pipe design system," Nuclear Instruments and Methods in Physics Research A, 585(2):474-479, October 2008. DOI: 10.1016/j.nima.2008.06.047.

• Arpith Jacob, Jeremy D. Buhler, and Roger D. Chamberlain, "Accelerating Nussinov RNA Secondary Structure Prediction with Systolic Arrays on FPGAs," in Proc. of IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2008, pp. 191-196.

• Arpith Jacob, Joseph Lancaster, Jeremy Buhler, Brandon Harris, and Roger D. Chamberlain, "Mercury BLASTP: Accelerating Protein Sequence Alignment," ACM Trans. on Reconfigurable Technology and Systems, 1(2):1-44, June 2008. DOI: 10.1145/1371579.1371581.

• Roger D. Chamberlain, Joseph M. Lancaster, and Ron K. Cytron, "Visions for Application Development on Hybrid Computing Systems," Parallel Computing, 34(4-5):201-216, May 2008. DOI: 10.1016/j.parco.2008.03.001.

• Praveen Krishnamurthy and Roger D. Chamberlain, "Analytic Performance Models for Bounded Queueing Systems," in Proc. of Workshop on Advances of Parallel and Distributed Computing Models (APDCM), April 2008 (associated with IPDPS).

• Joseph Lancaster, Ron Cytron, and Roger D. Chamberlain, "Understanding the Performance of Streaming Applications Deployed on Hybrid Systems," in Proc. of Next Generation Software Workshop (NGS), April 2008 (associated with IPDPS).

• Saurabh Gayen, Mark A. Franklin, Eric J. Tyson, Roger D. Chamberlain, "Simulation of Streaming Applications on Multicore Systems," in Proc. of 3rd Workshop on Software Tools for MultiCore Systems (STMCS), April 2008.

• Roger D. Chamberlain, Eric J. Tyson, Saurabh Gayen, Mark A. Franklin, Jeremy Buhler, Patrick Crowley, and James Buckley, "Application Development on Hybrid Systems," in Proc. of ACM/IEEE Supercomputing Conf. (SC07), November 2007.

• Praveen Krishnamurthy, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Kwame Gyang, Arpith Jacob, and Joseph Lancaster, "Biosequence Similarity Search on the Mercury System," Journal of VLSI Signal Processing, 49(1):101-121, October 2007.

• Roger D. Chamberlain and Berkley Shands, "Direct-Attached Disk Subsystem Performance Assessment," in Proc. of 4th International Workshop on Storage Network Architecture and Parallel I/Os (SNAPI), September 2007.

• Roger D. Chamberlain and Mark A. Franklin, "Automatic Deployment of Streaming Applications on Hybrid Architectures," in Proc. of 11th High Performance Embedded Computing Workshop (HPEC), September 2007.

• Roger D. Chamberlain and Berkley Shands, "Performance of Direct Attached Disk Subsystems," in Proc. of 11th High Performance Embedded Computing Workshop (HPEC), September 2007.

• Brandon Harris, Arpith C. Jacob, Joseph M. Lancaster, Jeremy Buhler, and Roger D. Chamberlain, "A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP," in Proc. of 17th International Conference on Field Programmable Logic and Applications (FPL), August 2007.

• Roger D. Chamberlain, Joseph Lancaster, and Ron K. Cytron, "Visions for Application Development on Hybrid Computing Systems." In Proc. of Reconfigurable Systems Summer Institute (RSSI), July 2007.

• Jeremy D. Buhler, Joseph M. Lancaster, Arpith C. Jacob, and Roger D. Chamberlain, "Mercury BLASTN: Faster DNA Sequence Comparison Using a Streaming Hardware Architecture." In Proc. of Reconfigurable Systems Summer Institute (RSSI), July 2007.

• Saurabh Gayen, Eric J. Tyson, Mark A. Franklin, and Roger D. Chamberlain, "A Federated Simulation Environment for Hybrid Systems." In Proc. of 21st International Workshop on Principles of Advanced and Distributed Simulation (PADS), June 2007, pp. 198-207.

• Richard Hough, Praveen Krishnamurthy, Roger D. Chamberlain, Ron K. Cytron, John Lockwood, and Jason Fritts, "Empirical Performance Assessment Using Soft-Core Processors on Reconfigurable Hardware." In Proc. of Workshop on Experimental Computer Science (ExpCS), June 2007.

• Arpith Jacob, Joseph Lancaster, Jeremy Buhler, and Roger D. Chamberlain, "FPGA-accelerated seed generation in Mercury BLASTP." In Proc. of 15th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2007, pp. 97-106.

• Arpith Jacob, Joseph Lancaster, Jeremy Buhler, and Roger D. Chamberlain, "Preliminary results in accelerating profile HMM search on FPGAs." In Proc. of 6th IEEE International Workshop on High Performance Computational Biology, March 2007.

• Roger D. Chamberlain, Mark A. Franklin, and Ronald S. Indeck, "Exploiting Reconfigurability for Text Search." Presented at 10th High Performance Embedded Computing Workshop, September 2006. This research was performed while on leave at Exegy Inc.

• Patrick Crowley, Mark A. Franklin, Jeremy Buhler, and Roger D. Chamberlain, "Impact of CMP Design on High-Performance Embedded Computing." Presented at 10th High Performance Embedded Computing Workshop, September 2006.

• Saurabh Gayen, Eric J. Tyson, Mark A. Franklin, Roger D. Chamberlain, and Patrick Crowley, "X-Sim: A Federated Heterogeneous Simulation Environment." Presented at 10th High Performance Embedded Computing Workshop, September 2006.

• Benjamin C. Brodie, Roger D. Chamberlain, Berkley Shands, and Jason White, "Dynamic Reconfigurable Computing." In Proc. of 9th Military and Aerospace Programmable Logic Devices International Conference, September 2006. This research was performed while on leave at Exegy Inc.

• Rahul P. Maddimsetty, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, and Brandon Harris, "Accelerator Design for Protein Sequence HMM Search." In Proc. of 20th ACM International Conference on Supercomputing, June 2006, pp. 288-296.

• Praveen Krishnamurthy, Roger D. Chamberlain, Ron K. Cytron, and Jason E. Fritts, "Evaluating Dusty Caches on General Workloads." In Proc. of 5th Workshop on Duplicating, Deconstructing, and Debunking, June 2006, pp. 9-16.

• Shobana Padmanabhan, Ron K. Cytron, Roger D. Chamberlain, and John W. Lockwood, "Automatic Application-Specific Microarchitecture Reconfiguration." In Proc. of 13th Reconfigurable Architectures Workshop, April 2006.

• Arpith Jacob, Brandon Harris, Jeremy Buhler, Roger D. Chamberlain, and Young H. Cho, "Scalable Softcore Vector Processor for Biosequence Applications." In Proc. of 14th IEEE Symposium on Field-Programmable Custom Computing Machines, April 2006, pp. 295-296.

• Gary Stiehr and Roger D. Chamberlain, "Improving Cluster Utilization through Intelligent Processor Sharing." In Proc. of Workshop on System Management Tools for Large-Scale Parallel Systems, April 2006.

• Roger D. Chamberlain, Ron K. Cytron, Jason E. Fritts, and John W. Lockwood, "Vision for Liquid Architecture." In Proc. of Next Generation Software Workshop, April 2006.

• Richard Hough, Phillip Jones, Scott Friedman, Roger Chamberlain, Jason Fritts, John Lockwood, and Ron Cytron, "Cycle-Accurate Microarchitecture Performance Evaluation." In Proc. of Workshop on Introspective Architecture, February 2006.

• Joseph Lancaster, Jeremy Buhler, and Roger D. Chamberlain, "Acceleration of Ungapped Extension in Mercury BLAST." In Proc. of 7th Workshop on Media and Streaming Processors, November 2005.

• Roger D. Chamberlain, "Embedding Applications within a Storage Appliance." Presented at 9th High Performance Embedded Computing Workshop, September 2005. This research was performed while on leave at Exegy Inc.

• Mark A. Franklin, Patrick Crowley, Roger D. Chamberlain, Jeremy Buhler, and James H. Buckley, "Application Development for Hybrid Pipelined Systems." Presented at 9th High Performance Embedded Computing Workshop, September 2005.

• Roger D. Chamberlain and Berkley Shands, "Streaming Data from Disk Store to Application." In Proc. of 3rd International Workshop on Storage Network Architecture and Parallel I/Os, September 2005, pp. 17-23.

• S. Friedman, P. Krishnamurthy, R. Chamberlain, R. K. Cytron, J. E. Fritts, "Dusty Caches for Reference Counting Garbage Collection." In Proc. of Workshop on Memory Performance: Dealing with Applications, Systems and Architecture, September 2005. Also published in ACM SIGARCH Computer Architecture News, 34(1):3-10, March 2006.

• Roger D. Chamberlain, Steven Miller, Jason White, and Dan Gall, "Highly-Scalable Reconfigurable Computing." In Proc. of 8th Military and Aerospace Programmable Logic Devices International Conference, September 2005. This research was performed while on leave at Exegy Inc.

• Shobana Padmanabhan, Phillip Jones, David V. Schuehler, Scott J. Friedman, Praveen Krishnamurthy, Huakai Zhang, Roger Chamberlain, Ron K. Cytron, Jason Fritts, and John W. Lockwood, "Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures." International Journal of Parallel Programming, 33(2-3):115-136, June 2005.

• Roger Chamberlain, John Lockwood, Saurabh Gayen, Richard Hough, and Phillip Jones, "Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory." In Proc. of International Conferenece on Microelectronic Systems Education, June 2005.

• Roger Chamberlain, Mark Franklin, Praveen Krishnamurthy, and Abhijit Mahajan, "VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance." Journal of VLSI Signal Processing, 40(1):57-72, May 2005.

• Daniel R. Fuhrmann, Lisandro Boggio, John Maschmeyer, and Roger Chamberlain, "Clutter Scattering Function Estimation and Ground Moving Target Detection from Multiple STAP Datacubes." In Proc. of IEEE International Conference on Acoustics, Speech, and Signal Processing, Vol. 5, March 2005, pp. 593-596.

• Roger Chamberlain and Ron K. Cytron, "Novel Techniques for Processing Unstructured Data Sets." In Proc. of IEEE Aerospace Conference, March 2005. This research was performed while on leave at Data Search Systems, Inc.

• Mark Franklin, Roger Chamberlain, Michael Henrichs, Berkley Shands, and Jason White, "An Architecture for Fast Processing of Large Unstructured Data Sets." In Proc. of 22nd International Conference on Computer Design, October 2004, pp. 280-287.

• Roger Chamberlain, Berkley Shands, and Jason White, "Achieving Real Data Throughput for an FPGA Co-Processor on Commodity Server Platforms." In Proc. of 1st Workshop on Building Block Engine Architectures for Computers and Networks, October 2004.

• Praveen Krishnamurthy, Jeremy Buhler, Roger Chamberlain, Mark Franklin, Kwame Gyang, and Joseph Lancaster, "Biosequence Similarity Search on the Mercury System." In Proc. of the IEEE 15th International Conference on Application-specific Systems, Architectures and Processors, September 2004, pp. 365-375.

• Phillip Jones, Shobana Padmanabhan, David V. Schuehler, Scott J. Friedman, Praveen Krishnamurthy, Huakai Zhang, Roger Chamberlain, Ron K. Cytron, Jason Fritts, and John W. Lockwood, "Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures." In Proc. of Workshop on Compilers and Tools for Constrained Embedded Systems, September 2004.

• David V. Schuehler, Benjamin C. Brodie, Roger D. Chamberlain, Ron K. Cytron, Scott J. Friedman, Jason Fritts, Phillip Jones, Praveen Krishnamurthy, John W. Lockwood, Shobana Padmanabhan, and Huakai Zhang, "Microarchitecture Optimization for Embedded Systems." Presented at 8th High Performance Embedded Computing Workshop, September 2004.

• Roger Chamberlain, Daniel R. Fuhrmann, John Maschmeyer, and Lisandro Boggio, "Parallel Matlab Computation for STAP Clutter Scattering Function Estimation and Moving Target Estimation." Presented at 8th High Performance Embedded Computing Workshop, September 2004.

• Roger D. Chamberlain, Jason E. Fritts, Praveen Krishnamurthy, and Hui Zhang, "Experimental Federated Modeling of an Optical Data Path." In Proc. of the 4th IASTED International Conference on Modelling, Simulation, and Optimization, August 2004, pp. 264-274.

• Qiong Zhang, Roger D. Chamberlain, Ronald S. Indeck, Benjamin West, and Jason White, "Massively Parallel Data Mining Using Reconfigurable Hardware: Approximate String Matching." In Proc. of Workshop on Massively Parallel Processing, April 2004.

• Benjamin West, Roger D. Chamberlain, Ronald S. Indeck, and Qiong Zhang, "An FPGA-based Search Engine for Unstructured Database." In Proc. of 2nd Workshop on Application Specific Processors, December 2003, pp. 25-32.

• Roger D. Chamberlain, Julius L. Goldstein, and Darko Ivanovich, "Implementation of Hearing Aid Signal Processing Algorithms on the TI DHP-100 Platform," in Proc. of 37th Asilomar Conf. on Signals, Systems and Computers, Volume 1, November 2003, pp. 404-409. DOI: 10.1109/ACSSC.2003.1291943.

• Roger D. Chamberlain, Ron K. Cytron, Mark A. Franklin, and Ronald S. Indeck, "The Mercury System: Exploiting Truly Fast Hardware for Data Search." In Proc. of International Workshop on Storage Network Architecture and Parallel I/Os, September 2003, pp. 65-72.

• Roger D. Chamberlain, Ron K. Cytron, Mark A. Franklin, and Ronald S. Indeck, "The Mercury System: Embedding Computation into Disk Drives." Presented at 7th High Performance Embedded Computing Workshop, September 2003.

• Praveen Krishnamurthy, Mark Franklin, and Roger Chamberlain, "Dynamic Reconfiguration of an Optical Interconnect." In Proc. of the 36th Annual Simulation Symp., April 2003, pp. 89-97.

• Roger Chamberlain, Eric Hemmeter, Robert Morley, and Jason White, "Modeling the Power Consumption of Audio Signal Processing Computations Using Customized Numerical Representations." In Proc. of the 36th Annual Simulation Symp., April 2003, pp. 249-255.

• Roger Chamberlain, Mark Franklin, and Ch'ng Shi Baw, "Gemini: An Optical Interconnection Network for Parallel Processing." IEEE Transactions on Parallel and Distributed Systems, 13(10):1038-1055, October 2002.

• Roger Chamberlain, Yen Hsiang Chew, Varuna DeAlwis, Eric Hemmeter, John Lockwood, Robert Morley, Ed Richter, Jason White, and Huakai Zhang, "Power Consumption of Customized Numerical Representations for Audio Signal Processing." Presented at 6th High Performance Embedded Computing Workshop, September 2002.

• Roger Chamberlain, Yen Hsiang Chew, Varuna DeAlwis, Eric Hemmeter, John Lockwood, Robert Morley, Ed Richter, Jason White, and Huakai Zhang, "Novel Numerical Representations for Low-Power Audio Signal Processing." Presented at International Hearing Aid Research Conference, August 2002. The poster is available here.

• Roger D. Chamberlain, Mark A. Franklin, and Praveen Krishnamurthy, "Optical Network Reconfiguration for Signal Processing Applications." In Proc. of the IEEE International Conference on Application-specific Systems, Architectures and Processors, July 2002, pp. 344-355.

• Michael D. DeVore, Roger D. Chamberlain, George L. Engel, Joseph A. O'Sullivan, and Mark A. Franklin, "Tradeoffs Between Quality of Results and Resource Consumption in a Recognition System." In Proc. of the IEEE International Conference on Application-specific Systems, Architectures and Processors, July 2002, pp. 391-402.

• Roger Chamberlain, Ch'ng Shi Baw, Mark Franklin, Christopher Hackmann, Praveen Krishnamurthy, Abhijit Mahajan, and Michael Wrighton, "Evaluating the Performance of Photonic Interconnection Networks." In Proc. of the 35th Annual Simulation Symp., April 2002, pp. 209-218.

• Jason Fritts and Roger Chamberlain, "Breaking the Memory Bottleneck with an Optical Data Path." In Proc. of the 35th Annual Simulation Symp., April 2002, pp. 352-362.

• Roger D. Chamberlain, Mark A. Franklin, and Praveen Krishnamurthy, "Performance Evaluation of a Reconfigurable, Embedded Photonic Multiring Interconnection Network." In Proc. of 5th High Performance Embedded Computing Workshop, November 2001.

• Michael D. DeVore, Joseph A. O'Sullivan, Roger D. Chamberlain, and Mark A. Franklin, "Dependence of Recognition Accuracy on Available Network Bandwidth." In Proc. of 5th High Performance Embedded Computing Workshop, November 2001.

• Roger D. Chamberlain, Mark A. Franklin, and Abhijit Mahajan, "VLSI Photonic Ring Interconnect for Embedded Multicomputers: Architecture and Performance." In Proc. of the ISCA 14th International Conference on Parallel and Distributed Computing Systems, August 2001, pp. 351-358.

• J.L. Goldstein, M. Valente, and R.D. Chamberlain, "Acoustic and Psychoacoustic Benefits of Adaptive Compression Thresholds in Hearing Aid Amplifiers that Mimic Cochlear Function." J. Acoust. Soc. Am., 109:2355(A), 2001.

• Bradley L. Noble, J. Cris Wade, and Roger D. Chamberlain, "Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation." In Proc. of the 34th Annual Simulation Symp., April 2001, pp. 56-64.

• Michael D. DeVore, Joseph A. O'Sullivan, Roger D. Chamberlain, and Mark A. Franklin, "Relationships Between Computational System Performance and Recognition System Performance." In Proc. of SPIE 15th Annual International Symposium on Aerospace/Defense Sensing, Simulation and Controls (Automatic Target Recognition XI), April 2001.

• R.D. Chamberlain and David P. Discher, "Simbench: A Logic Simulation Benchmark Set." In Proc. of the Mentor User's Group Conf., October 2000.

• Joseph A. O'Sullivan, Mark A. Franklin, Michael D. DeVore, and Roger D. Chamberlain, "Analysis of Computational System Performance in Automatic Target Recognition." In Proc. of 4th High Performance Embedded Computing Workshop, September 2000.

• Abhijit Mahajan, M.A. Franklin, and R.D. Chamberlain, "Fairness Issues in an Embedded Photonic Ring Interconnect." In Proc. of 4th High Performance Embedded Computing Workshop, September 2000.

• J.L. Goldstein, M. Valente, R.D. Chamberlain, P. Gilchrist, and D. Ivanovich, "Pilot Experiments with a Simulated Hearing Aid Based on Models of Cochlear Compression." In Proc. of International Hearing Aid Research Conference, August 2000.

• B.L. Noble and R.D. Chamberlain, "Analytic Performance Model for Speculative, Synchronous, Discrete-Event Simulation." In Proc. of 14th Workshop on Parallel and Distributed Simulation, June 2000, pp. 35-44.

• Ch'ng Shi Baw, R.D. Chamberlain, and M.A. Franklin, "Fair Scheduling in an Optical Interconnection Network." In Proc. of 7th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems, October 1999, pp. 56-65.

• Ch'ng Shi Baw, R.D. Chamberlain, M.A. Franklin, and M.G. Wrighton, "The Gemini Interconnect: Data Path Measurements and Performance Analysis." In Proc. of the 6th International Conference on Parallel Interconnects, October 1999, pp. 21-30.

• Ch'ng Shi Baw, R.D. Chamberlain, and M.A. Franklin, "Design of an Interconnection Network Using VLSI Photonics and Free-Space Optical Technologies." In Proc. of the 6th International Conference on Parallel Interconnects, October 1999, pp. 52-61.

• N.R. Jankowski, C. Bobcowski, D. Zipkin, R.R. Krchnavek, and R.D. Chamberlain, "MEMS-Based Optical Switch Design for Reconfigurable, Fault-Tolerant Optical Backplanes." In Proc. of the 6th International Conference on Parallel Interconnects, October 1999, pp. 149-156.

• T.D. Kimura, J.R. Gilman, R.A. Livingston, K. Chan, and R.D. Chamberlain, "Wireless Data Path for a Mobile, Modular Computer System." In Proc. of the 6th International Conference on Parallel Interconnects, October 1999, pp. 165-172.

• B.L. Noble and R.D. Chamberlain, "Performance Model for Speculative Simulation Using Predictive Optimism." In Proc. of 32nd Hawaii International Conference on System Sciences, January 1999. (Received Best Paper Award in the Software Technology Track.)

• R.D. Chamberlain, D. Chace, and A. Patil, "How Are We Doing? An Efficiency Measure for Shared, Heterogeneous Systems." In Proc. of the ISCA 11th International Conference on Parallel and Distributed Computing Systems, September 1998, pp. 15-21.

• R.D. Chamberlain, M.A. Franklin, R.R. Krchnavek, and B. Baysal, "Design of an Optically-Interconnected Multicomputer," In Proc. of 5th International Conference on Massively Parallel Processing Using Optical Interconnections, June 1998, pp. 114-122.

• W.A. Castellano, R.D. Chamberlain, and R.R. Krchnavek, "Optical Switching System for MPP, LAN, or WAN Systems." In Proc. of the 1997 IEEE Pacific Rim Conf. on Communications, Computers and Signal Processing, August 1997, pp. 260-264.

• G.D. Peterson and R.D. Chamberlain, "Parallel Application Performance in a Shared Resource Environment." Distributed Systems Engineering, 3:9-19, 1996.

• Y. Chen, B.L. Noble, and R.D. Chamberlain, "Comparing Edge-cuts to Communications Volume in Parallel VLSI Logic Simulation." In Proc. of the 8th IASTED International Conference on Parallel and Distributed Computing and Systems, October 1996, pp. 481-484.

• B.L. Noble and R.D. Chamberlain, "Performance of Speculative Computation in Synchronous Parallel Discrete-Event Simulation on Multiuser Execution Platforms." In Proc. of the 8th IASTED International Conference on Parallel and Distributed Computing and Systems, October 1996, pp. 489-494.

• G.D. Peterson and R.D. Chamberlain, "Parallel Processing the Easy Way: How to Do It and When It Works." Journal of Computers and Their Applications, 2(2), October 1995.

• R.R. Krchnavek, R.D. Chamberlain, T. Barry, V. Malhotra, and Z. Dittia, "Optical Interconnect Design for a Manufacturable Multicomputer." In Proc. of 2nd International Conference on Massively Parallel Processing Using Optical Interconnections, October 1995, pp. 279-288.

• B.L. Noble and R.D. Chamberlain, "Predicting the Future: Resource Requirements and Predictive Optimism." In Proc. of 9th Workshop on Parallel and Distributed Simulation, June 1995, pp. 157-164.

• R.D. Chamberlain, "Parallel Logic Simulation of VLSI Systems." In Proc. of 32nd Design Automation Conf., June 1995, pp. 139-143.

• G. Varghese, R.D. Chamberlain, and W.E. Weihl, "Deriving Global Virtual Time Algorithms from Conservative Simulation Protocols." Information Processing Letters, 54:121-126, 1995.

• R.D. Chamberlain and R.R. Krchnavek, "Optically Interconnected Multicomputers Using Inverted-Graph Topologies." IEEE Micro, 15(2):59-69, April 1995.

• R.D. Chamberlain, M.A. Franklin, G.D. Peterson, and M.A. Province, "Genetic Epidemiology, Parallel Algorithms, and Workstation Networks." In Proc. of 28th Hawaii International Conference on System Sciences, Vol. V, January 1995, pp. 101-110.

• B.L. Noble, G.D. Peterson, and R.D. Chamberlain, "Performance of Synchronous Parallel Discrete-Event Simulation." In Proc. of 28th Hawaii International Conference on System Sciences, Vol. II, January 1995, pp. 185-186.

• G.D. Peterson and R.D. Chamberlain, "Stealing Cycles: Can We Get Along?" In Proc. of 28th Hawaii International Conference on System Sciences, Vol. II, January 1995, pp. 422-431.

• G.D. Peterson and R.D. Chamberlain, "Sharing Networked Workstations: A Performance Model." In Proc. of 6th Symp. on Parallel and Distributed Processing, October 1994, pp. 308-315.

• M.A. Bailey, J.V. Briner, and R.D. Chamberlain, "Parallel Logic Simulation of VLSI Systems." ACM Computing Surveys, 26(3):255-294, September 1994.

• G.D. Peterson and R.D. Chamberlain, "Beyond Execution Time: Expanding the Use of Performance Models." IEEE Parallel & Distributed Technology, 2(2):37-49, Summer 1994.

• R.D. Chamberlain and C.L. Henderson, "Evaluating the Use of Pre-Simulation in VLSI Circuit Partitioning." In Proc. of 8th Workshop on Parallel and Distributed Simulation, July 1994, pp. 139-146.

• G. Varghese, R.D. Chamberlain, and W.E. Weihl, "The Pessimism Behind Optimistic Simulation." In Proc. of 8th Workshop on Parallel and Distributed Simulation, July 1994, pp. 126-131.

• R.D. Chamberlain and R.R. Krchnavek, "Topologies and Technologies for Optically Interconnected Multicomputers Using Inverted Graphs." In Proc. of 1st Workshop on Massively Parallel Processing Using Optical Interconnections, April 1994, pp. 255-265.

• G.D. Peterson and R.D. Chamberlain, "Performance Modeling Distributed Synchronous Iterative Algorithms." Tech. Rep. WUCCRC-94-03, February 1994.

• R.D. Chamberlain, "Inverted Graph Topologies for Optically Interconnected Multicomputers." Tech. Rep. WUCCRC-94-01, January 1994.

• G.D. Peterson and R.D. Chamberlain, "Exploiting Lookahead in Synchronous Parallel Simulation." In Proc. of Winter Simulation Conf., December 1993, pp. 706-712.

• R.D. Chamberlain and M.A. Franklin, "Performance Effects of Synchronization in Parallel Processors." In Proc. of 5th Symp. on Parallel and Distributed Processing, December 1993, pp. 611-616.

• R.D. Chamberlain and R.R. Krchnavek, "Architectures for Optically Interconnected Multicomputers." In Proc. of IEEE Global Telecommunications Conf., December 1993, pp. 1181-1186.

• G.D. Peterson and R.D. Chamberlain, "Performance of a Globally-Clocked Parallel Simulator." In Proc. of International Conference on Parallel Processing, Vol. III, August 1993, pp. 289-298.

• R.D. Chamberlain, "Fast Fourier Transform on a Hypercube Architecture Augmented with a Synchronization Network." Tech. Rep. WUCCRC-93-16, June 1993.

• E.E. Witte, R.D. Chamberlain, and M.A. Franklin, "Parallel Simulated Annealing Using Speculative Computation." IEEE Trans. on Parallel and Distributed Systems, 2(4):483-494, October 1991.

• R.D. Chamberlain and M.A. Franklin, "Analysis of Parallel Mixed-Mode Simulation Algorithms." In Proc. of International Parallel Processing Symposium, April 30-May 2, 1991, pp. 155-160.

• R.D. Chamberlain, "Gaussian Elimination on a Hypercube Architecture Augmented with a Synchronization Network." Tech. Rep. WUCCRC-91-12, April 1991.

• R.D. Chamberlain, "Potential Performance of Parallel Logic Simulation for Random and Heuristic Partitionings." Tech. Rep. WUCCRC-90-13, November 1990.

• R.D. Chamberlain, "Matrix Multiplication on a Hypercube Architecture Augmented with a Synchronization Network." Tech. Rep. WUCCRC-90-11, November 1990.

• E.E. Witte, R.D. Chamberlain, and M.A. Franklin, "Task Assignment by Parallel Simulated Annealing." In Proc. of International Conference on Computer Design, October 1990, pp. 74-77.

• R.D. Chamberlain and M.A. Franklin, "Hierarchical Discrete-Event Simulation on Hypercube Architectures." IEEE Micro, 10(4):10-20, August 1990.

• E.E. Witte, R.D. Chamberlain, and M.A. Franklin, "Parallel Simulated Annealing Using Speculative Computation." In Proc. of International Conference on Parallel Processing, Vol. III, August 1990, pp. 286-290.

• R.D. Chamberlain and M.A. Franklin, "Discrete-Event Simulation on Hypercube Architectures." In Proc. of International Conference on Computer-Aided Design, November 1988, pp. 272-275.

• R.D. Chamberlain, M.N. Edelman, M.A. Franklin, and E.E. Witte, "Simulated Annealing on a Multiprocessor." In Proc. of International Conference on Computer Design, 1988, pp. 540-544.

• R.D. Chamberlain and M.N. Edelman, "Lsim2 User's Manual." Tech. Rep. WUCS-88-3, January 1988.

• R.D. Chamberlain and M.A. Franklin, "A Unified Approach to Mixed-Mode Simulation." Tech. Rep. WUCS-86-20, November 1986.

• R.D. Chamberlain and M.A. Franklin, "Collecting Data About Logic Simulation." IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, CAD-5(3):405-412, July 1986.

• K.F. Wong, M.A. Franklin, R.D. Chamberlain, and B.L. Shing, "Statistics on Logic Simulation." In Proc. of 23rd Design Automation Conf., June 29-July 2, 1986, pp. 13-19.

• R.D. Chamberlain, "Lsim User Manual." Tech. Rep. WUCS-86-1, January 1986.

• R.D. Chamberlain, S. Husodo, and B.L. Shing, "Priority Queue Project." Tech. Rep. WUCCSD-85-14, December 1985.

Last modified 05 Jan 2026. Return to Roger's home page.

Roger Chamberlain <roger AT wustl.edu>