"ABR Switch Algorithm Testing: A Case Study with ERICA," ATM Forum/96-1267, October 1996

This contribution discusses the requirements of ATM Available Bit Rate switch algorithms, and demonstrates how each of these requirements can be tested. As a case study, the performance of the ERICA switch algorithm [1] is evaluated and the effect of some features and options of the algorithm is examined. The requirements tested include: efficiency, delay, fairness, transient and steady state performance, scalability, and adaptation to variable capacity and various source traffic models. The performance of the algorithm is evaluated for various configurations and background traffic patterns.

Contribution in Adobe Acrobat (6,382,007 bytes) | text *without* figures (50,240 bytes)

Presentation slides in Adobe Acrobat format (121,882 Bytes)

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