" Frame Delay Through ATM Switches and Networks: MIMO Latency and its Aggregation ", ANSI T1A1.3/99-019, May 3, 1999.

This contribution addresses the problem of measuring frame latency in ATM switches. The frames consisting of several ATM cells may arrive with numerous gaps between cells. It is important that the gaps present in the input stream be not counted towards the switch's contribution to the frame delay. The proposed solution called "MIMO" (Message-In Message-Out) latency improves upon FILO (First-In Last-Out) and LILO (Last-In Last-Out) latencies commonly used for continuous frame technologies such as frame relay.

Briefly, the MIMO latency is defined as the difference between the LILO latency through the switch and that through an ideal switch. The definition and the discussion also apply to any network of switches as well.

This contribution shows also how to compute the MIMO latency of a network path consisting of several components from the MIMO latencies of individual components.

Complete contribution in Adobe Acrobat 3.0 (109,694 bytes)

Presentation slides in Adobe Acrobat 3.0 Format (50,679 bytes) |

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