Monday, Dec 3, 2007
Day 1
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7:00-8:40 AM
Continental Breakfast & Registration
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9 - 10 AM
Keynote 1- Networking via
content
Van Jacobson
Research Fellow, PARC
Abstract:
In the 60s and 70s networking was seen as a way to share scarce
resources -- tape drives, printers, special purpose cpus, unique
programs, etc. The host and port abstractions embodied in TCP/IP (and
other protocols developed during that time) were just what was needed
to expand the notion of an I/O channel from machine room to planetary
scale. Today the overwhelming use of networking is to move content
around (email, web pages, files, ...) but even though the problem has
changed the solution hasn't -- we still map content identifiers to
hosts and ports to transport it. I'll try to convince you that named
content is a more appropriate abstraction for the networking we do
today and that a network architecture based solely on named content is
simpler, more expressive, more efficient, more scalable and far more
secure than anything we currently use.
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10 - 10:30 AM
Break
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10:30AM - 12PM
Session 1:
Architecture
Session Chair: Ahmed Louri, University of Arizona
Ruler: easy packet matching and rewriting on network processors (paper, slides)
Kees Reeuwijk,
Tomas Hruby, Herbert Bos
Optimization of Pattern Matching Algorithm for Memory Based
Architecture (paper, slides)
Cheng-Hung Lin,
Yu-Tang Tai, Shih-Chieh Chang
Towards High-performance Flow-level Packet
Processing on Multi-core Network Processors (paper, slides)
Yaxuan Qi, Bo Xu,
Fei He, Baohua Yang, Jianming Yu, Jun Li
Frame Shared Memory: Line-Rate Networking on Commodity Hardware (paper, slides)
John Giacomoni,
John Bennett, Antonio Carzaniga, Douglas Sicker, Manish Vachharajani,
Alexander L. Wolf
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12 - 1:30 PM
LUNCH
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12 - 5:00
PM
Poster Session
Experimental Evaluation of a Coarse-Grained Switch Scheduler (paper)
Charles Wiseman,
Jonathan Turner
Design of a Network Architecture with Inherent Data
Path Security (paper)
Tilman Wolf
Experimenting with Buffer Sizes in Routers (paper)
Neda Beheshti, Jad
Naous, Yashar Ganjali, Nick McKeown
To CMP or not to CMP: Analyzing Packet Classification on Modern and
Traditional Parallel Architectures (paper)
Randy Smith, Dan
Gibson, Shijin Kong
Flow-Slice: A Novel Load-Balancing Scheme for Multi-Path Switching
Systems (paper)
Lei Shi, Bin Liu,
Changhua Sun, Zhengyu Yin, Laxmi Bhuyan, H. Jonathan Chao |
1:30 -
3:00 PM
Session
2: Hardware
Session Chair: Manish Vachharajani, University of Colorado
Design of Energy-Efficient Adaptive Channel Buffers for
Network-on-Chips Architecture (paper, slides)
Avinash Kodi,
Ahmed Louri, Ashwini Sarathy
Performance Scalability of a Multi-Core Web Server (paper, slides)
Bryan Veal, Annie
Foong
Automated Task Distribution in Multicore Network
Processors using Statistical Analysis (paper, slides)
Arindam
Mallik, Gokhan Memik
Optimal Packet Scheduling in Output-Buffered Optical Switches with
Limited-Range Wavelength Conversion (paper, slides)
Lin Liu, Yuanyuan
Yang
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3:00 - 3:30 PM
Break
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3:30 -
5:00 PM
Session
3: Switch Optimization
Session Chair: Peter Onufryk, IDT
Low-Latency Scheduling in Large Switches (paper, slides)
Wladek Olesinski,
Hans Eberle, Nils Gura, Andres Mejia
On LID Assignment in InfiniBand Networks (paper, slides)
Wickus Nienaber,
Xin Yuan, Zhenhai Duan
Frame-Aggregated Concurrent Matching Switch (paper, slides)
Bill Lin, Isaac
Keslassy
Congestion
Management in 3-Stage Clos Networks (paper, slides)
Nikolaos Chrysos
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6:30 - 9:00 PM
Drinks & Dinner
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Tuesday, Dec 4, 2007
Day Two
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8 - 9AM
Continental Breakfast
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9 - 10 AM
Keynote 2- Reducing energy
consumption for networked applications
Jeff Mogul
HP Labs
Slides
Abstract:
Computers use too much electricity. Plenty of researchers and
product developers are working on improving energy efficiency. Most of
these efforts focus on specific components. In this talk, I
will
try to give an end-to-end perspective on the energy efficiency of
networked applications, include research in progress and some ideas
about where to look next. I will look at issues such as
developing the appropriate benchmarks, coordination across layers to
improve efficiency, and a variety of interesting technologies.
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10 - 10:30 AM
Break
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10:30 -
12 PM
Session 4: Regular Expressions & Pattern Matching
Session
Chair: Hari Cadambi, NEC-Labs
Compiling PCRE to FPGA for Accelerating SNORT IDS (paper, slides)
Abhishek Mitra,
Walid Najjar, Laxmi Bhuyan
High-Speed Packet Classification Using 2-dimensional Binary Search on
Length (paper, slides)
Hyesook Lim, Ju
Hyoung Mun
An Improved Algorithm to Accelerate Regular Expression Evaluation (paper, slides)
Michela Becchi,
Patrick Crowley
Curing Regular Expressions Matching Algorithms from Insomnia, Amnesia,
and Acalculia (paper, slides)
Sailesh Kumar,
Balakrishnan Chandrasekaran, Jonathan Turner, George Varghese
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12 - 1:30 PM
LUNCH
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1:30 -
3:00 PM
Panel Session
Open Router Platforms: Is it time to move to an open routing
infrastructure?
Moderator: Patrick Crowley, Washington University in St. Louis (slides)
Panelists:
- Derek McAuley, Netronome (slides)
- Thomas Woo, Alcatel-Lucent (slides)
- Jon Turner, Washington University in St. Louis (slides)
- Chuck Kalmanek, AT&T Labs Research (slides)
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3:00 - 3:30 PM
Break
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3:30
- 5 PM
Session 5: Detection and Inspection
Session Chair: Tilman Wolf, Univ. of Massachusetts
Enhancing interoperability and stateful analysis of cooperative network
intrusion detection systems (paper, slides)
Michele Colajanni,
Daniele Gozzi, Mirco Marchetti
High-Speed Detection of Unsolicited Bulk Emails (paper, slides)
Sheng-Ya Lin,
Cheng-Chung Tan, Jyh-Charn Liu, Michael Oehler
A Programmable Message Classification Engine for Session
Initiation Protocol (SIP) (paper, slides)
Arup Acharya,
Xiping Wang, Charles Wright
DPICO: A High Speed Deep Packet Inspection Engine using Compact Finite
Automata (paper, slides)
Christopher Hayes,
Yan Luo
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5 PM
CLOSING REMARKS/ADJOURN
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