* t-line with simple circuit, source, Rs, t-line, Rt
* Note: first line **must be** a comment, woe to him/her who does otherwise
* This file has been simulated with HSPICE to verify syntax: 2004.02.09  FUR
* CIRCUIT COMPONENTS AND DESCRIPTION, FIRST LETTER IDENTIFIES TYPE
*                         V1  V2    TD   TR    TF    PW   PER
Vsource  Vs  0    PULSE ( 0   1     0    0.5N  0.5N  10N  20N)

*tline two input terminals, two output terminals, Zo, and length (seconds)
Tr1 0 TlineIn 0 Vt Z0=tlinez td=tlinedel
* Load Capacitance included here.  Typical value of package input C
* ranges from 4pF to 10pF.  Note effect of Capacitance on waveforms
* worst case high level for Rt>100 Ohms is degraded by short duration
* negative spike caused by load capacitance.
Rs  Vs TlineIn  Rs

C1  0 Vt loadC
Rt  0 Vt Rt

* SIMULATION PARAMETERS, Small step size is important for good results in ELDO
*      print-step duration
.tran .001n       20n
.option post

* COMPONENT PARAMETER VALUES (MAKES MODIFICATION EASIER)
.param tlinedel=2ns
.param tlinez=100
.param loadC=2pF
.param Rt=100
.param Rs=0

* ALTER STATEMENTS TO RE-RUN SIMULATION WITH DIFFERENT CONDITIONS
* THIS CAN INCLUDE TEMP, VDD, MODELS, AND OTHER
* Text following the alter statement is a comment used to identify output 
.alter   change Rt to 200 Ohms
.param Rt=200

* THIS IS THE END STATEMENT, HSPICE REQUIRES IT, SOME SPICES DO NOT
.end