Digital computers and digital information processing systems; Boolean algebra, principles and methodology of logic design; machine language programming; register transfer logic; microprocessor hardware, software and interfacing; fundamentals of circuits and systems; computer organization and control; memory systems, arithmetic unit design. Occasional laboratory exercises. Prerequisites: CS 101 or 136. Credit: 3 units.
This is a first course in digital logic design and elements of computer architecture. The course covers all of the first six chapters of the Mano and Kime textbook, plus parts of chapters seven and eight. The book comes with a CD ROM for the student edition of the Xilinx logic design tools. These will be used throughout the course, in both lectures and homeworks. Schematic capture, VHDL and logic simulation will all be introduced.
Problem Sets and Quizzes. Quizzes will be given weekly, every Wednesday
when problem sets are due.
Quiz problems are based directly on problem sets, which are posted on the
web site. The web site provides both the problems and the solutions.
You are strongly encouraged to work the problems on your own
before consulting the solutions. This is the best preparation for the quizzes. Problem sets are not collected or graded. However, the course
TAs will review your solutions on request and will help you with any
questions you may have. You are encouraged to form study groups and to
work with your fellow students to improve your understanding of the
course material, but don't let this become a crutch. The only way
to really learn the material is to work problems on your own.
On quizzes and exams you will not be allowed to use any calculation device.
Please know how to do arithmetic and base conversions without such aids.
The two exams are closed-book except that you will be allowed one 8.5x11 inch cheat-sheet
that will be handwritten (no photocopies or mechanical productions).
Quizzes are strictly closed-book with no cheat-sheet allowed.
Design Problems. The design problems involve use of computer-aided design tools to design and simulate circuits to solve particular problems. Several design problems will be assigned during the semester. Some of these require considerable time and effort. Do not leave them to the last minute. You are expected to do ALL your own work on design problems. You may discuss general approaches to the design problems with your fellow students, and the TAs will provide hints and general guidance to point you in the right direction. However, you are expected to turn in your own work and only your own work. You should not share any specific details of your design with other students. Sharing of schematics, VHDL code, simulation output or any other written material is expressly forbidden. Any group of students found to have collaborated inappropriately on a design problem will have the full value of the design problem deducted from the grades of all students involved. Repeat offenses will not be treated so leniently.
Expectations. This course covers a great deal of material and you will need to devote substantial time and effort to mastering it. You should plan to read the textbooks, work problem sets and do the design problems. You cannot expect to learn the material simply by attending class. Engineering is not a spectator sport. It requires your active and energetic participation. The good news is that the more you let yourself get involved in what you're doing, the more you will learn and the more you will enjoy the creative and inventive aspects of engineering that make it both fun and rewarding.
Late Policy. Design problems are due at the beginning of class on the day indicated. Solutions will be posted on the web site the same evening. Late submissions will not be accepted, not even for partial credit. No exceptions. If, for some reason, you cannot make it to class, have a friend bring it or turn it in to the instructor any time before the class when due.
On-line Communication. Most information about the course can be obtained electronically. In addition to this web site, there is a Yahoo! group (http://groups.yahoo.com/group/cse260/) which you can access through your favorite web browser. I strongly recommend that you use this group to post questions you may have about lecture material, problem sets and design problems. The TAs and I will use it to answer questions about problem sets and provide guidance (and occasional hints) on design problems. It will also be used to post clarifications and corrections and to make general announcements, so you should monitor it regularly.
There is also a link to the Prentice Hall web site for the textbook. This includes supplementary material that I encourage you to peruse and answers to selected textbook problems. There is also a link to the Xilinx web site, which you will find useful when we start to use the Xilinx CAD software.
Computer Aided Design Tools. The course makes extensive use of the Xilinx student edition design tools. These are a slightly scaled-down version of a standard commercial CAD package. I STRONGLY RECOMMEND that you install the tools on a personal PC if you have access to one, since CEC can get busy and at times the software might not be available. I have run the tools under both Windows 98 and Windows 2000 without any trouble. They will run fine on a laptop (I do it all the time). They require close to 1 GB of disk space for installation and in general, the more memory you have the better (128 MB is adequate). They run fine on a 300 MHz class machine.
Consulting Hours. The primary role of the TAs in this course
is to help you learn the material. All of the TAs hold regular
consulting sessions. (Times below.) If you're having trouble
with the problem sets, or need some guidance to help you get started
on a design problem, take the time to go see the TAs, and they
will do their best to help you. Don't expect them to do your work for
you. They are there to help you learn how to do it yourself. Unless
otherwise noted, all will be in the Grader's Office (Lopata 408/409).
|
Jenny |
Frank | Rutvik | |
| Sunday |
6-9 p.m. | ||
| Monday |
10 a.m.-1p.m., 6-9 p.m. | ||
| Tuesday | 4-7 p.m. |
Examinations. There will be two exams given during the semester, during class periods. The mid term exam is scheduled for October 9 (subject to change). The final exam will be given on Friday, December 13 from 10:30 a.m. to 12:30 p.m. (not subject to change).
Prepared by David M. Zar: dzar@cse.wustl.edu, Updated Friday, August 30, 2002 .