CAREER: Time and Event Based System Software Construction


NSF Support

This research is supported by the National Science Foundation, grant CCF-0448562.


Project Description

The goal of this research is to define and develop a novel suite of tools and techniques for verifiable system software construction. Towards that end, this project is investigating (1) formal models based on timed automata for canonical sets of primitive system software mechanisms, (2) algebraic representations of how automata for primitive mechanisms can be composed to form more complex mechanisms that are prevalent in current system software practice, and (3) type systems and other techniques for efficient guidance and checking of system software composition and configuration. This approach allows system developers to leverage application-specific constraints on the timing and ordering of system events, to guide composition of new mechanisms and customization of previously composed mechanisms.

The aim of this project is to make it easier for a wide audience of designers, developers and testers to specify, implement and verify correct behavior of software systems. The software and educational materials developed under this project are released on-line and open-source.


Project Participants

Christopher D. Gill, Assistant Professor, Department of Computer Science and Engineering, School of Engineering and Applied Science, Washington University in St. Louis, is Principal Investigator for this research.

Doctoral students at Washington University in St. Louis who have contributed to this research include Venkita Subramonian (who earned his doctorate in May, 2006, and is now a researcher with AT&T Labs in Florham Park, NJ), Huang-Ming Huang, and Terry Tidwell.

Colleagues at other universities with whom we have collaborated based on the results of this research include:


Invited Colloquia and Master Classes at Washington University


Doctoral Dissertation


Doctoral Dissertation Proposal


Publications


Presentations


Discoveries

A fundamental and fine-grained set of models is needed to be able to uncover subtle safety and timing errors introduced by interference between application computations, particularly in the face of alternative concurrency and dispatching strategies in the middleware layer. To address this need, we have made several contributions in the research so far: (1) developing the models themselves, (2) identifying and developing refinements to the models to increase their fidelity to the middleware domain and to reduce the cost of checking them, and (3) applying our models to verification of properties in several different application and protocol scenarios.


Research Infrastructure

The timed automata models we have developed for the timing and event semantics of fundamental mechanisms in the ACE framework are freely available on-line as open-source for the IF toolkit at http://www.cs.wustl.edu/~venkita/mw_models/if_work/ and for UPPAAL at http://www.cs.wustl.edu/~venkita/mw_models/uppaal_work/.